IBM Press room – United States

10 IBM Breakthroughs in 10 Years

10 IBM Breakthroughs in 10 Years -- Beginning with the use of copper for chip wiring, IBM has announced 10 semiconductor innovations over the course of 10 years that have enabled computers and many other kinds of electronic devices to become smaller, less expensive, more powerful, and more energy efficient. IBM today announced it has harnessed the natural tendency of materials to form patterns to create a vacuum between the miles of wires inside chips. This provides better insulation speeding performance and reducing power consumption.

IBM SiGe (Silcon Germanium)

IBM SiGe (Silcon Germanium) process used in bipolar chipmaking in place of gallium arsenide, allows for significant improvements in operating frequency, current noise, and power capabilities for todays mobil and wireless devices. All that and it can fit in the iris of a human eye.

POWER5 - Power Timeline

POWER5 - Power5 Chip Die

IBM introduces POWER5, the world's most advanced microprocessor. POWER5 will be the "brain" of a new line of powerful computer systems that will be introduced in 2004.

IBM POWER6 Microprocessor, 300mm Wafer

IBM POWER6 -- Hundreds of IBM POWER6 microprocessors on a silicon wafer. The wafer is cut into individual chips that are then packaged and then built into new IBM servers that offer twice the performance with virtually no increase in energy consumption. Each chip has two cores, runs at speeds up to 4.7 GHz, and contains 790 million transistors.

POWER6

IBM POWER6 -- Hundreds of IBM POWER6 microprocessors on a silicon wafer. The wafer is cut into individual chips that are then packaged and then built into new IBM servers that offer twice the performance with virtually no increase in energy consumption. Each chip has two cores, runs at speeds up to 4.7 GHz, and contains 790 million transistors.

IBM POWER6

IBM POWER6 -- IBM's new POWER6 chip is a 64 bit, dual-core processor with 790 million transistors running at up to 4.7 GHz and eight megabytes of on chip Level 2 cache. The company today launched its first new POWER6 server, the IBM System p 570, which has set 25 performance benchmark records across a broad range of business and technical applications.

IBM POWER6 microprocessors arrive

IBM POWER6 microprocessors arrive-- IBM Test Manufacturing Technician B.J. Barrett tests POWER6 microprocessors at the company's Burlington, Vermont facility. IBM today launched its first POWER6-based systems that set new benchmarks for speed, energy efficiency and virtualization capabilities.

Multichip Module, The heart of an IBM System p5 595

Multichip Module -- The heart of an IBM System p5 595 is this multichip module. Each of the four center chips contains two POWER5 microprocessor cores. The outer four chips each hold 36MB of Level 3 cache. One system can hold as many as 64 cores, or eight of the multichip modules shown here.

IBM System p5 models 590 and 595 use dual stress microprocessor technology

IBM's Dual Stress technology breakthrough (code-named Squeezebox), deployed first in video game platforms and now in the most powerful commercial computer, was developed at IBM's facility in East Fishkill, NY.

IBM System p5 models 590 and 595 use dual stress microprocessor technology

IBM's Dual Stress technology breakthrough (code-named Squeezebox), deployed first in video game platforms and now in the most powerful commercial computer, was developed at IBM's facility in East Fishkill, NY.

IBM 300mm manufacturing facility at East Fishkill, NY

IBM innovations in microelectronics have transformed the world of semiconductors. Among the breakthroughs are Copper Conductors, Silicon Germanium (SiGe), Silicon on Insulator (SOI) and Strained Silicon. These advanced processes are used to manufacture semiconductor chips in an IBM 300mm manufacturing facility at East Fishkill, NY.

"Top Fab 2005"

IBM?s 300-millimeter wafer manufacturing facility was named "Top Fab 2005" by Semiconductor International Magazine. The fully automated ?hands-free? fabricator features the world?s most advanced Computer Integrated Manufacturing architecture and control systems -- a model of On Demand Business.

IBM's mask technology center in Burlington, Vermont,

IBM's mask technology center in Burlington, Vermont, develops and manufactures all the masks for the company's 300-millimeter and 200- millimeter wafer fabricators. Masks are used to "print" chip circuitry on wafers in a process similar to photography.

STMicroelectronics and IBM to Collaborate on Chip Technology

Unnamed IBM engineer inspects a 300mm CMOS wafer at IBM's East Fishkill, New York semiconductor fabrication facility. Today STMicroelectronics joined an IBM-led CMOS process-technology development, design enablement and advanced research alliance whose partners include AMD, Chartered, Infineon, Samsung, Sony, Toshiba and Freescale.

IBM eDRAM test chip

Magnificent Memory -- IBM announced a major breakthrough in microchip design that will more than triple the amount of memory contained on a single high-end chip. With the advent of multi-core chips, memory has become an increasingly critical aspect of microprocessor performance. This prototype eDRAM, or Embedded Dynamic Random Access Memory chip, contains over 12 million bits and high-performance logic. It will be available in IBM products beginning next year.

Two IBM Transistors

Two IBM Transistors -- This cross section of a new IBM POWER6, 64-bit dual-core microprocessor was photographed using a scanning electron microscope and shows two transistors, shown as a gold color, out of the 790 million on this thumbnail sized chip. At 4.7 GHz, the dual-core POWER6 processor doubles the speed of the previous chips with virtually no increase in electrical consumption.

Cross-section of 64-bit high-performance microprocessor chip

Cross-section of 64-bit high-performance microprocessor chip built in IBM's 90 nm Server-Class CMOS technology with Cu/low-k wiring. Above the transistors, the wiring levels include one W local interconnect, five "1x-scaled" Cu levels in full SiCOH low-k dielectric, three "2x-scaled" Cu/SiCOH levels, two "6x-scaled" Cu levels in FTEOS/SiO2 dielectric, and finally, one Al(Cu) terminal pad and wiring level. The minimum M1 Cu line widths and spaces are 0.12 um.

IBM Airgap Microprocessor

IBM Airgap Microprocessor -- This microprocessor cross section shows empty space in between the chip's wiring. Wires are usually insulated with a glass-like material. IBM has integrated self-assembly techniques, long confined to laboratories, with its manufacturing lines to create a test version of its latest microprocessors that use vacuum gaps to insulate the miles of nano-scale wire that connect hundreds of millions of transistors. The breakthrough reduces electrical interference, raises processor performance, and lowers energy consumption.

From Traditional Printing to High Resolution Nano Printing

TOP: The traditional printing method known as "gravure printing", where an image is etched on the surface of a metal plate, the etched area is filled with ink, then the plate is rotated on a cylinder that transfers the image to paper or other material. This method allows for features as small as 10,000 nanometers, far too big for use in electronics. BOTTOM: IBM's novel new nano printing method, which uses a self-assembly process to control the arrangement of tiny nanoparticles, in this case 20,000 gold particles, each about 60 nanometers in diameter. The gold nanoparticles are swept across a surface and convective forces in the liquid push the particles into grooves in the surface, forming nanostructures with a well-defined geometry. The IBM scientists believe this method could be used for mass production -- more efficiently and at a lower cost -- to place particles as small as 2 nanometers in diameter to fabricate atomic scale nanowires, ultra tiny lenses for optics and biosensors for healthcare.

Cell Broadband Engine

IBM / Sony / Toshiba jointly developed Cell DD2 die (chip)

IBM EXTENDS MOORE'S LAW TO THE THIRD DIMENSION

IBM EXTENDS MOORE'S LAW TO THE THIRD DIMENSION: An IBM scientist holds a thinned wafer of silicon computer circuits, which is ready for bonding to another circuit wafer, where IBM's advanced "through-silicon via" process will connect the wafers together by etching thousands of holes through each layer and filling them with metal to create 3-D integrated stacked chips. The IBM breakthrough can shorten wire lengths inside chips up to 1000 times and allow for hundreds more pathways for data to flow among different functions on a chip. This technique will extend Moore's Law beyond its expected limits, paving the way for a new breed of smaller, faster and lower power chips.

IBM Hydro Cluster Water Cooling Technology

IBM Research's Water Cooled Chips: Scientists at IBM's Zurich Research Lab are working on the future of water cooling, brining cold water to the hottest part, directly on the chip itself, and then capturing the water at its hottest and piping it off the chip for re-use.

IBM and Georgia Tech Break Silicon Speed Record

Close up of cryogenic test station in the Georgia Electronic Design Center at Georgia Tech in Atlanta. The facility is capable of cooling electronic devices to temperatures near absolute zero.

Carbon nanotube: Light emissions

IBM scientists simultaneously inject positive and negative charges into a carbon nanotube through the source and drain electrodes at its two ends.

IBM Scientists Create Method to Measure the Performance of Carbon Nanotubes as Building Blocks for Ultra Tiny Computer Chips of the Future

IBM scientists have measured the distribution of electrical charges in tubes of carbon that measure less than 2 nanometers in diameter, 50,000 times thinner than a strand of human hair. This novel technique, which relies on the interactions between electrons and phonons, provides a detailed understanding of the electrical behavior of carbon nanotubes, a material that shows promise as a building block for much smaller, faster and lower power computer chips compared to today's conventional silicon transistors.

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